The invention relates to a power semiconductor element, in particular to a power MOS transistor of the planar type or a power transistor of the trench type.
In the course of the development of new generations of DMOS power transistors, the reduction of the specific On-resistance Ron. A is an important objective. Reducing the value of this parameter results in minimizing of the static power loss, whereas higher current densities may be achieved. Both effects make it possible to use smaller and cheaper semiconductor elements or chips, respectively, for controlling a total current of a predetermined level. Another parameter of such semiconductor element is a high resistivity against avalanche breakdown in the blocking or reverse operation mode of the element.
Prior developments in this field had frequently the unsatisfactory result that some progress in optimizing the one of the important parameters could be achieved, whereas at the same time the other important parameter could not be maintained at a favourable level.
For these and other reasons, there is a need for the present invention.